AAC / CellSMART Packet Protocol Module
(1 port; up to 52Mbps)

Frame-based interfaces, user-selectable:

ATM DXI/FUNI

SMDS DXI

Frame Relay UNI

HDLC frames (frame forwarding mode)

HSSI

DS3

E3

Quad V.35/EIA-530

Tri V.35/EIA-530 DSX-1/Tri V.35/EIA-530 E1

51.2 Mbps

SMDS over ATM via SMDS DXI or ATM DXI/FUNI.

Utilizes AAL3/4

Frame Relay over ATM

Service or network interworking per VC via Frame Relay UNI

Service interworking only via ATM DXI

Utilizes AAL5

HDLC Frame Forwarding (of HDLC framed data)

Utilizes AAL5

nrt-VBR, rt-VBR, UBR, and UBR+

SMDS DXI mode (two user selectable options):

1 VC with MID multiplexing capability, all traffic routed to a connectionless server over an ATM UNI or to another port with an SMDS interface (AAL 3/4). In E.164 address resolution mode, different destination E.164 addresses are mapped to different VPIs/VCIs.

HDLC Frame Forwarding Mode: 1 VC for all HDLC frames. All traffic routed to a single destination (channel extension) over an ATM UNI or to another HDLC port (AAL5).

Frame Relay UNI: 2047 VCCs or DLCIs (AAL5). 2-byte header: 1023 DLCIs, maximum. 4-byte header: 731 DLCIs, maximum

ATM DXI (two user selectable options):

Mode 1b. Maximum of 2048 connections of which up to 255 can be VPCs (AAL5 or AAL3/5).

Mode 1b Extended. Same as Mode 1b except the DXI header occupies four octets instead of two.

Congestion management algorithm with partial packet discard and early packet discard and 4 VBR priorities

Two options:

Non-blcoking input queue.

Input buffers of up to 64 packets with a maximum length of 9232 octets.

210 cells

VBR output queue, with traffic and congestion management capability.

MAR and SCR rate control for CLP₀₊₁, per VC.

Up to 128 simultaneous reassembly buffers of packets up to 9232 octets in length

User-selectable increase in number of simultaneous reassemblies to 36 with MTU reduced to 4616 octets.

Number of valid cells (input and output)

Number of cells discarded for SCR vilolation

Number of cells discarded for congestion

Number of cells discarded due to corrupted AAL3/4 payload

Number of valid packets (input and output)

Number of packets discarded for invalid address (DLCI or DFA)

Number of discarded input packets (FCS errors)

Number of discarded AAL5 CPCS_PDUs (CRC error after reassembly)

Number of packets discarded due to reassembly time-outs

Number of packets discarded due to unavailable reassembly buffer

The 16-bit FCS shall be the one specified in: CCITT Q.921 (CRC16).

The 32-bit CRC (FCS) shall be the one specified in: ISO 9314-2, 1989

Section 4.2.2.2.2 (p 4-21) of Bellcore TR-TSV-000772, "Generic System Requirements in Support of Switched Multi-megabit Data Service" Issue 1, May 1991.

The primary specifications defining the functions performed by OAM cells are: Chapter 4 of Bellcore GR-1113, "Asynchronous Transfer Mode (ATM) and ATM Adaptation Layer (AAL) Protocols" Issue 1, July 1994.

ITU-T 1.610, B-ISDN "Operation and Maintenance Principles and Functions" March, 1993.

The format of the ATM DXI packets themselves is defined in: ATM Forum "ATM Data Exchange Interface (DXI) Specification Version 1.0, " August 4, 1993.

The mehtod for performing segmentation and reassembly is defined in: ATM Forum "ATM Data Exchange (DXI) Specification Version 1.0, " August 4, 1993.

For AAL3/4 connections: Chapter 7 of Bellcore GR-1113, "Asynchronous Transfer Mode (ATM) and ATM Adaptation Layer (AAL) Protocols" Issue 1, July 1994.

For AAL5 connections: Chapter 8 of Bellcore GR-1113, "Asynchronous Transfer Mode (ATM) and ATM Adaptation Layer (AAL) Protocols" Issue 1, July 1994.

ATM Data Exchange Interface (DXI), Version 1.0 August 4, 1993.

ITU-T Q.992 "ISDN Data Link Layer Specifications for Frame Mode Bearer Services" 1992.