AAC / CellSMART Quad V.35/EIA-530 Physical Layer Module

Common Requirements
Line rate, internal clock	56 kbps to 8.192 Mbps, user selectable When the Quad V.35/EIA-530 PLM is used with a Packet PM, the single port provides a maximum rate of 8.192 Mbps.
Maximum common mode input voltage	10 V
Maximum differential input voltage	12 V

Balanced Signals Transmit and Receive Data, Clear to Send, Received Line Signal Detector, Transmit and Receive Signal Element Timing
DC line offset	0.4 V max
Input sensitivity	< 200 mV
Output leakage current Iol	< 100 micro A
Output short circuit current	< 150 mA
Output voltage V₀ (EIA-530)	2 V < V₀ < 6 V
Output voltage V_o (V.35)	1.10 Vpp +/- 20%
Source impedance	< 100 ohms

Unbalanced Signals DCE Ready, DTE Ready, Local Loopback, Remote Loopback, Test Mode, Ring Indicator
Input sensitivity	< 200 mV
Output drive	> 90% of V_o into 450 ohms

Standards Compliance
Meets applicable requirements of the following standards/generic requirements	ANSI/EIA-530-1987, EIA Standard, "High Speed 25-Position Interface for Data Terminal Equipment and Data Circuit-Terminating Equipment, " March 1987. CCITT V.35 Red Book 1985, "Data Communication over the Telephone Network Recommendations for the V Series."

Standards Compliance

Meets applicable requirements of the following standards/generic requirements

ANSI/EIA-530-1987, EIA Standard, "High Speed 25-Position Interface for Data Terminal Equipment and Data Circuit-Terminating Equipment, " March 1987.

CCITT V.35 Red Book 1985, "Data Communication over the Telephone Network Recommendations for the V Series."

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