AAC / CellSMART DSX-1 and Tri V.35/EIA-530 Physical Layer Module

Common Requirements (V.35/EIA-530)
Line rate, internal clock

56 kbps to 8.192 Mbps, user selectable

Maximum common mode input voltage

10 V

Maximum differential input voltage

12 V

Balanced Signals (V.35/EIA-530)
Transmit and Receive Data, Clear to Send, Received Line Signal Detector, Transmit and Receive Signal Element Timing
DC line offset

0.4 V max

Input sensitivity

< 200 mV

Output leakage current lo1

< 100 micro A

Output short circuit current

< 150 mA

Output voltage Vo (EIA-530)

2 V < Vo < 6 V

Output voltage Vo (V.35)

1.10 Vpp +/- 20%

Source impedance

< 100 ohms

Unbalanced Signals (V.35/EIA-530)
DCE Ready, DTE Ready, Local Loopback, Remote Loopback, Test Mode, Ring Indicator
Input sensitivity

< 200 mV

Output drive

> 90% of Vo into 450 ohms

Standards Compliance (V.35/EIA-530)
Meets applicable requirements of the following standards/generic requirements

ANSI/EIA-530-1987, EIA Standard, "High Speed 25-Position Interface for Data Terminal Equipment and Data Circuit-Terminating Equipment, " March 1987

CCITT V.35 Red Book 1985, "Data Communication over the Telephone Network Recommendations for the V Series."

Common Requirements (DSX-1)
Fractional support

N x 64 or N x 56

Framing format

ESF or SF (D4)

Interface connector

DA15S

Line code

B8ZS or AMI

Line rate, internal clock

1.544 Mbps +/- 20 ppm

Input Requirements (DSX-1)
Jitter tolerance

Conforms to ITU-T Recommendation G.824 (03/93), Section 3.1.1, Table 2

Line rate tolerance

1.544 Mbps +/- 200 bps

Signal level

0 to -10 dBm

Output Requirements (DSX-1)
Jitter generation

Conforms to ITU-T Recommendation G.824 (03/93), Section 2.1, Table 1

Output level

DSX-1 at the connector

Pulse shape

Conforms to ANSI T1.403-1989 Section 5.3.4.1, Figure 2

Standards Compliance (DSX-1)
Meets applicable requirements of the following standards/generic requirements

ANSI T1.403-1995, Standard for Telecommunications, "Network-to-Customer Installation--DS1 Metallic Interface, " March 21, 1995.

ANSI T1.102-1993, Standard for Telecommunications, "Digital Hierarchy--Electrical Interfaces, " December 8, 1993.

ANSI T1.107-1988, Standard for Telecommunications, "Digital Hierarchy--Formats Specification, " August 25, 1988.

ITU-T G.824-1993, "Digital Networks--The Control of Jitter and Wander within Digital Networks which are Based on the 1544 kbit/s Hierarchy, " March 1993.

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